Logic Gate : AND, OR, NAND, XOR, HALF_ADDER, FULL_ADDER
등등 구현 연습
def and_gate(x1, x2, bias):
if (x2 + x1 - bias) > 1: return True
else: return False
def or_gate(x1, x2, bias):
if (x2 + x1 - bias) > 0: return True
else: return False
def nand_gate(x1, x2, bias):
return not and_gate(x1, x2, bias)
def xor_gate(x1, x2, bias):
_or = or_gate(x1, x2, bias)
_nand = nand_gate(x1, x2, bias)
return and_gate(_or, _nand, bias)
def half_adder(x1, x2, bias):
s = or_gate(x1, x2, bias)
c = and_gate(x1, x2, bias)
return s, c
def full_adder(*bits, bias):
s, c = half_adder(bits[0], bits[1], bias)
S = [s]
if len(bits) > 2:
for bit in bits[2:]:
s, c = half_adder(c, bit, bias)
S.append(s)
# add carry over
S.append(c)
return sum(S)
bias = 0
TT = [True, True, bias]
FT = [False, True, bias]
TF = [True, False, bias]
FF = [False, False, bias]
exec_data = TT
and_x = and_gate(*exec_data)
or_x = or_gate(*exec_data)
nand_x = nand_gate(*exec_data)
xor_x = xor_gate(*exec_data)
print(f'X1, X2, bias : {exec_data}')
print(f'AND : {and_x}')
print(f'OR : {or_x}')
print(f'NAND : {nand_x}')
print(f'XOR : {xor_x}')
print(f'HALF adder(sum, carry over) : {half_adder(*exec_data)}')
print(f'FULL adder : {full_adder(False, True, True, True, True, True, True, bias=bias)}')
출력값
X1, X2, bias : [True, True, 0]
AND : True
OR : True
NAND : False
XOR : False
HALF adder(sum, carry over) : (True, True)
FULL adder : 6
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